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Chip multiprocessor architecture techniques to improve throughput and latency

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Chip multiprocessor architecture techniques to improve throughput and latency

by
Olukotun, Oyekunle Ayinde

Publication date
Topics
Parallel processing (Electronic computers), High performance processors, Computer architecture
Publisher
[San Rafael, Calif.] : Morgan & Claypool Publishers
Collection
inlibrary; printdisabled; internetarchivebooks
Contributor
Internet Archive
Language
English
viii, 145 p. :

Title from PDF t.p. (viewed Nov. 26, 2007)

Includes bibliographical references

1. The Case for CMPs -- 2. Improving Throughput -- 3. Improving Latency Automatically -- 4. Improving Latency Using Manual Parallel Programming -- 5. A Multicore World: The Future of CMPs

System requirements: Adobe Acrobat Reader

Mode of access: World Wide Web
Access-restricted-item
true
Addeddate
2023-06-10 20:25:37
Associated-names
Hammond, Lance Stirling; Laudon, James P
Autocrop_version
0.0.15_books-20220331-0.2
Boxid
IA40978004
Camera
Sony Alpha-A6300 (Control)
Collection_set
printdisabled
External-identifier
urn:lcp:chipmultiprocess0000oluk:epub:fd5fc9f1-d831-4528-a9cb-0956a88e5134
urn:lcp:chipmultiprocess0000oluk:lcpdf:70c35ddf-af26-4489-bf1b-c45aa1c47377
urn:oclc:record:1391285123[WorldCat (this item)]
Foldoutcount
0
Identifier
chipmultiprocess0000oluk
Identifier-ark
ark:/13960/s2j5br0nz8r
Invoice
1652
Full catalog record
MARCXML

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